Smaller critical dimension (CD) and tighter pitch for both line/space patterns and contact holes allows denser circuitry to be created and therefore reduces overall production cost. For resist space shrink, two widely used processes to reduce the dimensions of patterned features are SAFIER (shrink assist film for enhanced resolution) and RELACS (resolution enhancement lithography assisted by chemical shrink). The SAFIER process decreases the dimensions of the spaces between adjacent resist structures by covering the patterned resist with a layer of polymer which contracts during subsequent heating and stretches the resist structures. The RELACS process uses acid catalyzed cross-linking polymers to form a crosslinked coating around the existing resist features. However, both these processes have detrimental dependencies on pattern geometry (density and pitch) or resist chemistry which 1) limits the shrink dimension and uniformity in the RELACS process and 2) limits the process window in the SAFIER process. For reducing the pitch, sidewall coating processes have also been utilized to reduce the pitch of a lithographic pattern. However these patterning processes require a large number of process steps, frequently require many deposition steps employing expensive tools, and in some cases the dimensions of the resulting structures are dependent upon the coating thickness. Therefore, there exists a need for a high throughput method for cost effectively reducing resist feature dimensions or pitches, which is less sensitive to the resist chemistry and process conditions.